Design Verification Engineer Job Listing at AMD in Bengaluru, KA (Job ID 79195-en-us)

Description

WHAT YOU DO AT AMD CHANGES EVERYTHING 

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.  Together, we advance your career.  

Senior Design Verification Engineer About the Team

The AMD Data Fabric Team is responsible for designing and verifying the high-performance on-chip interconnect architecture that connects CPU cores, GPU engines, memory controllers, I/O subsystems, and accelerators across AMD SoCs and chiplet-based systems. Data Fabric is a critical backbone technology used in AMD's server, client, and high-performance computing platforms.

Role Overview

As a Senior Design Verification Engineer, you will lead verification efforts for complex Data Fabric IP and SoC-level integrations. You will be responsible for defining verification strategies, developing scalable UVM-based environments, and ensuring first-silicon success for cutting-edge products.

This role requires deep expertise in system-level verification, strong architectural understanding, and the ability to collaborate across architecture, RTL, physical design, and post-silicon validation teams.

Key Responsibilities

• Define and execute verification strategies for Data Fabric IP and subsystem components.

• Develop and enhance UVM/SystemVerilog-based verification environments.

• Create reusable VIPs, scoreboards, monitors, and coverage models.

• Drive constrained-random and directed testing methodologies.

• Develop assertions (SVA) and formal verification checks.

• Lead block-level and subsystem-level verification closure.

• Perform coverage analysis (functional and code coverage) and drive closure.

• Debug complex failures involving coherency, ordering, arbitration, QoS, and protocol compliance.

• Participate in architecture reviews and provide feedback from a verification perspective.

• Mentor junior engineers and contribute to methodology improvements.

• Collaborate with firmware, validation, and post-silicon teams for issue resolution.

Required Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.

• 6+ years of experience in design verification of complex ASIC/SoC designs.

• Strong expertise in:

  • SystemVerilog and UVM

  • Assertion-based verification (SVA)

  • Functional coverage modeling

  • Constrained-random verification

• Experience verifying:

  • On-chip interconnects (NoC, crossbar, coherent fabrics)

  • Cache coherency protocols

  • High-speed interfaces (PCIe, CXL, DDR, AXI, CHI, etc.)

• Experience with simulation tools (VCS, Xcelium, Questa).

• Strong debugging skills at RTL and system level.

• Experience with scripting (Python, Perl, TCL, or shell).

Preferred Qualifications

• Experience with multi-die / chiplet-based architectures.

• Knowledge of coherency protocols used in server-class CPUs.

• Exposure to performance verification and traffic modeling.

• Experience with emulation (Palladium, Veloce) or FPGA prototyping.

• Formal verification experience (JasperGold or similar).

• Understanding of power-aware verification (UPF/CPF).

• #LI-BM2

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

 

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD's “Responsible AI Policy” is available here.

 

This posting is for an existing vacancy.

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