Director - Silicon Design Engineering Job Listing at AMD in Santa Clara, CA (Job ID 80743-en-us)

Description

WHAT YOU DO AT AMD CHANGES EVERYTHING 

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.  Together, we advance your career.  

THE ROLE:

AMD is seeking a Director of Pre-Silicon Verification to lead execution, people, and delivery across high-impact silicon programs within a mixed-signal IP organization supporting AMD's broader product portfolio.

In this role, you will own end-to-end verification execution across multiple concurrent programs, ensuring strong planning, clear visibility into progress, and consistent delivery of high-quality silicon on schedule.

THE PERSON:

You will build and lead high-performing teams while remaining technically engaged to guide decisions, identify risks early, and drive resolution of complex challenges.

This is a highly visible leadership role with accountability for execution excellence, organizational health, and scalable verification capability in a rapidly growing environment.

KEY RESPONSIBILITIES:

Execution Leadership:

• Own end-to-end pre-silicon verification execution across multiple IPs and/or subsystem programs.
• Drive schedule, quality, and coverage closure aligned with program milestones.
• Establish clear and actionable execution plans, including resource alignment, milestone definition, and risk management.
• Ensure strong predictability and transparency across all verification deliverables.
• Lead cross-functional alignment with design, architecture, firmware, and program management teams.

Operational Excellence:

• Drive consistent execution cadence through regular status reviews, reporting, and metrics tracking.
• Monitor key verification indicators such as coverage progression, bug trends, regression health, and schedule adherence.
• Establish a data-driven approach to identify risks early and improve execution over time.
• Promote best practices that improve efficiency, scalability, and quality across teams.

Technical Engagement & Oversight:

• Stay engaged in verification strategy, test planning, and coverage closure discussions.
• Provide guidance on methodology adoption, debug efficiency, and verification completeness.
• Participate in key technical reviews to ensure quality, alignment, and risk identification.
• Support resolution of complex issues, including debug challenges and coverage gaps, without becoming the primary execution owner.

People & Organizational Leadership:

• Build, lead, and develop a high-performing DV organization, including managers, technical leads, and individual contributors.
• Drive hiring, mentoring, and succession planning to scale the organization effectively.
• Foster a culture of accountability, ownership, and collaboration.
• Coach leaders and engineers to elevate both technical capability and execution discipline.
• Scale teams across global and distributed environments.

Stakeholder & Customer Alignment:

• Act as the primary point of accountability for DV execution with senior leadership.
• Communicate status, risks, and mitigation plans clearly and proactively.
• Ensure alignment with internal stakeholders and deliver to their expectations.
• Build strong partnerships with design and architecture teams to enable seamless execution.

Prioritization & Multi-Program Management:

• Effectively manage multiple concurrent programs, balancing priorities and resources across competing demands.
• Establish clear prioritization to ensure focus on highest-impact deliverables and risks.
• Drive parallel progress across programs while maintaining attention to detail and execution quality.

PREFERRED EXPERIENCE:

• Proven track record of delivering complex silicon programs on schedule with high quality.
• Experience managing teams of 20+ engineers, including managers and senior technical leads.
• Strong technical background in verification methodologies, including SystemVerilog/UVM and coverage-driven verification.
• Mixed-signal verification (RNM, AMS co-simulation) preferred.
• Experience working across multiple concurrent programs and global teams.
• Demonstrated ability to drive structured execution and metrics-based decision-making.
• Strong communication and stakeholder management skills.

ACADEMIC CREDENTIALS:  

• Bachelor's or master's degree in electrical or computer engineering.

LOCATION:  Santa Clara, CA  ( Open to other AMD Locations)

#LI-SL3

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD's “Responsible AI Policy” is available here.

This posting is for an existing vacancy.