Description
WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_
THE ROLE:
AMD is seeking a RTL Power/ Design Engineer. The focus of this role is to plan, build, and execute the verification of new and existing features for AMD's graphics processor IP, resulting in no bugs in the final design.
THE PERSON:
You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
KEY RESPONSIBILITIES:
- Experience in DGPU Power Optimization and Modeling
- Drive Power Optimization and Modeling advances for multi-generational roadmap to maximize power and cost constrained performance for AMD graphics platforms
- Work with product teams to understand the PPA requirements, translate those into requirements for various IP blocks, evangelize for power efficiency and drive attainment.
- Guide the power optimization team and IP implementation teams in identifying power optimization opportunities, estimate ROI, and establish plan of record.
- Drive the Architecture, uArchitectural optimization RTL design fixes to deliver the best design for Perf@Watt, Perf/Watt and Perf/$
- Specify Power Test Plans at Graphics Subsystem blocks and at Graphics level, review and sign-off on PTPX/Power Artist data readouts
- Use judgement in projecting dyn power improvements per IP and for whole SOC, and provide up-leveled readouts to project leadership and executives
- Provide guidance to team developing IP Power Models of different kinds, and drive correlation to RTL and Silicon at various stages
PREFERRED EXPERIENCE:
- Expertise in Frontend development of Silicon - Architectural, uArch and RTL design.
- Proven hands-on experience and engineering leadership in GPU or CPU low power design and power modeling
- Solid background in electrical circuits, VLSI and IP design fundamentals
- Deep familiarity with ASIC/SoC Design cycles and methodologies including RTL, Verification, Emulation, Physical Design and post-si validation
- Fluent familiarity with power tools like Power Artist and PTPX.
- Principal or Staff Engineer level experience working with high-powered senior engineering teams driving critical initiatives and projects
- Collaboration with cross-functional, cross-geography technical teams to deliver industry leading performance and power efficiency in Compute SoC products
ACADEMIC CREDENTIALS:
- Undergraduate degree required. Related disciplines preferred.
#LI-BM1
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Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
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